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20261006-0315-air-hub-reference-board-and-schematics Define the Air Hub reference boards, component lists and KiCad schematics for AH-19 and AH-20

  • status: completed
  • createdAt: 2026-10-06 03:15
  • approvedAt: 2026-10-06 04:30 (owner: "用SSD2351核心板")
  • relatedTask: 20261006-0315-air-hub-reference-board-and-schematics

Context

章节标题：“Context”

Spec P05-air-hub.md R1.0 (2026-09-29) and design appendix R0.8 select:

  • Air Hub (AH-19): RV1106G3 chip-down + SPI NAND (alternate SSD202D), EFR32MG21 (BLE / Zigbee / Thread by image, UART), ESP32-C6-MINI-1 (Wi-Fi uplink, configuration channel, TWAI CAN via ESP-Hosted link, GW-11), TJA1463, built-in 10/100 PHY; no 433 MHz.
  • Air Hub Pro (AH-20): RK3506J stamp-hole core board (native CAN), EFR32MG21, ESP32-C6 (Wi-Fi + configuration, TWAI off), CMT2300A 433 MHz (GW-09), external RMII PHY.

The owner now asks for the hardware plan of both, with the Vanxoak core board for the Pro.

Existing artefacts:

  • /srv/ybo/switch/air_hub/ holds a KiCad 10 schematic + PCB of the superseded R0.2–R0.4 design (SSD202D SoM socket + 2x ESP32-C6, LMR36510, TJA1463), generated by tools/gen_air_hub.py on top of tools/kicad_gen.py (symbol extraction from the KiCad libraries, inline custom symbols, net-label connectivity) and run inside ghcr.io/kicad/kicad:10.0.6-full (tools/run.sh). The directory is not a git repository.
  • Design appendix §2.5 names LMR36506-Q1 (0.6 A) for 5 V and TLV755P for 3.3 V; §5 fixes the interfaces (EFR32MG21 UART, C6 SDIO, CMT2300A SPI, NAND on FSPI; RK3506J NAND core board exposes SDMMC for the C6).

Device facts collected on 2026-10-06 (archived datasheets in refs/datasheets/air-hub/, Vanxoak online manual, LCSC):

  • RV1106G3 (QFN128, 0.35 mm): rails CPU_DVDD 0.9 V (AVS via PWM0, pin 74), DVDD/PMU 0.9 V, DDR_VDDQ 1.35 V (in-package DDR3L still needs the rail), 1.8 V analog (OSC/PLL, DDR PLL, USB, ETH, OTP), 3.3 V (PMU, RTC, USB, ETH, GPIO banks); 24 MHz crystal; 32.768 kHz RTC crystal; internal 10/100 PHY on pins 97–100 (+ ETH_EXTR 102); FSPI on pins 39/41/42/44/47/48; SDMMC1_M0 on pins 109–114; UART1_M0 with RTS/CTS on pins 64/65/75/76; UART0_M0 debug on 58/59; UART4_M0 on 77/78; USB on 25–27; nPOR 66; SARADC_IN0/1 on 22/23. LCSC C5328706 lists it today at $22.67 @30 (stock 1184), far above the $5.56 @100 recorded on 2026-09-29.
  • HD-RK3506J-256F256LI (Vanxoak, 35x35 mm, 128 stamp holes, 1 mm): 5 V in (pins 1–4, 100 mA average, 300 mA start-up peak), VCC_3V3 out 500 mA (pins 5/6) and VCC_1V8 out 250 mA (7/8) which the vendor says not to use for carrier peripherals except as the enable of the carrier's own regulators (power-up sequencing); RMII0 pins 23–31 with PHY reset on 108; SDMMC pins 34–39 (NAND version only); USB OTG0 55–58 (flash port, VBUSDET 3 V); NPOR_L 46 (1 k pull-up on board); BOOT 47/48 (ADC keys, 100 R series); UART0 debug 111/112; UART1–3 TX/RX only (113–118, no RTS/CTS); CAN0 119/120; SPI0 124–127; 3.3 V GPIO on 83, 91, 92, 94–101, 105–109; I2C2 (103/104) carries the on-board RJGT102. −40…+85 °C. Price not published.
  • EFR32MG21A020F1024IM32-BR QFN32: PAVDD 3.3 V for +20 dBm (185 mA TX), 38.4 MHz crystal mandatory, DECOUPLE 1 µF, RF2G4_IO1/2 single-ended; LCSC C2151614 $2.35 @1k (stock 2067).
  • ESP32-C6-MINI-1-N4: 3.3 V, 354 mA peak, SDIO slave on IO18–IO23, EN + IO9 strap, UART0 on IO16/IO17; LCSC C5736265 $2.83 @1.3k.
  • CMT2300A-EQR QFN16: 1.8–3.6 V, 26 MHz crystal, 3-wire SPI (SCLK/SDIO/CSB/FCSB) + GPIO1–3 interrupts; LCSC C192930 $0.88 @1k (stock 10835).
  • TJA1463AT/0Z SO14 LCSC C3233821 $1.31 (stock 7270); HVSON14 variant has 12 in stock.
  • LMR36520ADDAR (65 V, 2 A, HSOIC-8) LCSC C2879422 $1.14 (stock 6679); the LMR36506-Q1 named in the appendix is 0.6 A, below the summed peaks (Pro: core board 0.3 A + C6 0.35 A + MG21 0.19 A + PHY + CAN + CMT2300A; Hub: RV1106 rails + the same radios).
  • TPS62A02ADRLR (5.5 V in, 2 A, 2.4 MHz) $0.18, TLV75518PDBVR 1.8 V LDO $0.23, DP83825I RMII PHY (−40…+85 °C, KiCad symbol available); LAN8720AI is not stocked at LCSC.
  • KiCad 10 library coverage: symbols exist for LAN8720A, DP83825I, TPS62A0x, TLV755xx, LMR36510ADDA (LMR36520 pin-compatible, value override), ESP32-C6-MINI-1, USB-C 16P, RJ45 magjacks, NUP2105L, USBLC6, TPS3823; custom symbols needed for RV1106G3 (128 pins, built from the datasheet pin table), EFR32MG21 QFN32, CMT2300A, W25N02KV, HD-RK3506J core board, TJA1463 (already inline).

Proposal

章节标题：“Proposal”

Full tier (documentation across the Air Hub package plus the KiCad workspace).

A. Documentation (/srv/ybo/docs)

章节标题：“A. Documentation (/srv/ybo/docs)”
  1. New Level-2 page bizplan/product/switch/air-hub/P05-air-hub-design-reference-board.md (kind: design, aspect "reference board", Chinese), covering both products:
    • §1 scope and relation to spec / appendix (no Level-1 value changes);
    • §2 block diagram and interface allocation per product (table: function → SoC or core-board pin → carrier net), including the ESP32-C6 and EFR32MG21 pin maps shared by both boards;
    • §3 power tree with rail voltages, consumers and peak currents: 8–32 V → fuse / TVS / reverse-polarity P-FET → LMR36520 5 V (2 A) → TJA1463 VCC/VBAT, core board 5 V (Pro), TPS62A02 3.3 V (radios, PHY, logic), TLV75518 1.8 V; Air Hub adds the RV1106G3 rails (0.9 V CPU with PWM AVS, 0.9 V logic/PMU, 1.35 V DDR VDDQ) from TPS62A0x bucks, following the Rockchip reference at D1;
    • §4 module notes: input protection, 5 V buck, SoC / core-board minimum system (24 MHz and 32.768 kHz crystals, nPOR, BOOT/RECOVERY keys, debug UART, USB OTG0 flash port), SPI NAND, Ethernet (internal PHY + magjack; DP83825I + magjack on the Pro), EFR32MG21 (3.3 V on all supplies, 38.4 MHz, 20 dBm match, chip antenna, UART with RTS/CTS on the Hub and XON/XOFF on the Pro because the core board exposes TX/RX only, RESETn and SWD pads), ESP32-C6 (SDIO, EN/BOOT from Linux GPIO, UART0 to a Linux UART for flashing, TWAI + STB_N/EN on the Hub only), TJA1463 + CMC + NUP2105L + DNP 120 R, CMT2300A (26 MHz, 433.92 MHz match, SMA, Pro only), USB-C service port (VBUS sense only), buttons, LEDs, test points;
    • §5 component list per product: MPN, manufacturer, package, quantity, LCSC code, unit price at the 1k tier where listed, alternates and the temperature grade; passives grouped;
    • §6 BOM sum versus the spec §2.1 range, listing the deltas (RV1106G3 price jump, EFR32MG21 price drop, LMR36520 vs LMR36506) as inputs to AIR-O-03 without changing the spec;
    • §7 schematic projects (paths, generator, how to regenerate, ERC result) and §8 items left to D1 (Rockchip RV1106 reference-schematic check of the rail sequencing and AVS, PHY magjack industrial grade, EFR32MG21 20 dBm match values from AN930, CMT2300A match from the CMOSTEK 433 MHz reference, SSD202D alternate layout); §9 change log.
  2. P05-air-hub-design.md R0.9: relations list links the new page; §2.5 power row names LMR36520 (2 A) with the reason; §3 diagram unchanged; change-log row.
  3. index.md of the package: new row for the reference-board page.
  4. docs/changelog.md entry; task and plan status.

B. Schematics (/srv/ybo/switch, not a git repository)

章节标题：“B. Schematics (/srv/ybo/switch, not a git repository)”
  1. Rename the superseded project directory to /srv/ybo/switch/air_hub_r0_ssd202d/ (keeps the old SoM-socket design, PCB and gerbers for reference) and generate a fresh air_hub/.
  2. Rewrite tools/gen_air_hub.py for AH-19: sheets root / power / soc (RV1106G3 custom 128-pin symbol, NAND, crystals, rails) / radio (EFR32MG21 + ESP32-C6) / can / service. Custom symbols: RV1106G3 (pin table parsed from the datasheet), EFR32MG21 QFN32, W25N02KVZEIR, CMT2300A, HD-RK3506J core board, TJA1463.
  3. New tools/gen_air_hub_pro.py for AH-20 with the same sheet structure: core-board symbol instead of the SoC, DP83825I RMII PHY, CMT2300A + SMA, C6 on SDMMC, EFR32MG21 on UART1.
  4. tools/run.sh takes the project name (run.sh air_hub / run.sh air_hub_pro); it writes net.xml, erc.json, bom.csv, PDF and per-sheet SVG; run inside ghcr.io/kicad/kicad:10.0.6-full with --label ai-agent=true, mounting /srv/ybo/switch only. Fix ERC until tools/check.py reports zero real violations.
  5. PCB layout (gen_pcb.py) is not regenerated: the placement is specific to the old board and the user asked for schematics. The old PCB stays with the renamed directory.

Risks

章节标题：“Risks”
  • RV1106G3 price at LCSC today ($22.67 @30) contradicts the $5.56 @100 used in the spec BOM; if it holds, Air Hub's cost gap widens by about $17 and the SSD202D alternate (or RV1106G2 / RV1103G1) becomes the realistic entry SoC. Reported under AIR-O-03, not decided here.
  • RV1106G3 power-rail sequencing, AVS feedback and the boot-key wiring come from the datasheet pin table, not from a Rockchip reference schematic; marked for D1 verification.
  • Core board UART1–3 have no RTS/CTS: EZSP must run with XON/XOFF software flow control on the Pro, or the Zigbee NCP image must be configured accordingly.
  • Custom symbols are hand-built; pin numbers are copied from the datasheets and checked by ERC only (no footprint/PCB check in this task).
  • Vanxoak has not published the core-board price; the Pro BOM keeps the FET3506J-S figure as a placeholder.

Scope

章节标题：“Scope”

Docs: 1 new page, 3 edited pages (design appendix, package index, changelog) plus task/plan files. Workspace: 2 generator scripts, 1 shell script, 2 KiCad projects (about 12 sheet files plus exports). No code in the product software.

Alternatives

章节标题：“Alternatives”
  • Draw the schematics by hand in KiCad instead of generating them: slower, not reproducible, and the existing workflow is generator-based.
  • Only a block-level SVG schematic (fireworks diagram) instead of KiCad: cheaper, but the owner asked for a schematic and the workspace already carries KiCad projects.
  • Keep LMR36506-Q1 and add a second buck: more parts than one LMR36520.
  • Use LAN8720A on the Pro: commercial grade (0…70 °C) only at LCSC; DP83825I is industrial.

Annotations

章节标题：“Annotations”
  • 2026-10-06: owner asked to look at SSD2351 next to SSD202D for the entry SoC. Findings (not yet a decision): SSD2351D/Q is a quad Cortex-A35 1.5 GHz SoC with in-package DDR3/L in the same QFN128 12.3 mm / 0.35 mm outline; the Pcupid BSP documents 6 UART + 4 FUART with RTS/CTS, 6 I2C, SPI, 1 SDIO, eMMC, 2 USB 2.0 ports each host or device, 2 EMAC with a built-in 10/100 PHY, and no CAN module; MYZR sells a 26x26 mm core board (128 MB + 128 MB NAND) at 48 CNY tax included, rated −20…+70 °C. Unverified: the D / Q memory sizes, the chip's own temperature grade, chip price, pin compatibility with SSD202D, SDK kernel version. SSD202D (datasheet V0.4): dual Cortex-A7, 128 MB, 1 SPI master, 3 UART + 1 FUART, SDIO 2.0, two USB 2.0 hosts, built-in PHY, −20…+85 °C, no CAN. Either keeps the AH-19 architecture (CAN on the ESP32-C6); neither fits AH-20. Waiting for the owner's choice before the entry board is drawn.
  • 2026-10-06: owner chose the SSD2351 core board for the entry Air Hub ("用SSD2351核心板"); taken as approval of this plan with the entry platform changed. Revised scope:
    • Entry board = MYZR-SSD2351-CB112 (26x26 mm, 112 stamp holes, SSD2351D 128 MB or SSD2351Q 256 MB in package, SPI NAND on board, single 3.3 V supply, Linux 6.1 SDK, rated −20…+70 °C) instead of RV1106G3 chip-down; the RV1106G3 rails, SPI NAND, crystals and the custom 128-pin SoC symbol drop out. The core board brings out RMII only, so the entry board also carries a DP83825I PHY. FUART1 (with RTS/CTS) serves the EFR32MG21, SD/SDIO the ESP32-C6, USB port 0 the service port.
    • This changes Level-1 content: spec P05-air-hub.md R1.1 redefines AH-19 (new platform row H15, product table, §2.4, AIR-O-03), and the design appendix, guide, brief, package index, line pages, product plan, open questions, evaluation and the 2026-09-27 temperature decision follow. BOM figures are restated from the part-level list with the open prices marked.
    • Schematics: tools/hub_common.py (shared symbols and sheet builders), tools/gen_air_hub.py, tools/gen_air_hub_pro.py, tools/verify_net.py (netlist versus the generator's intended connections).